WARFT Students presented paper titled Performance and Energy Efficient Cache System Design : Simultaneous Execution of Multiple Applications across Heterogeneous Cores
Monday, 04 November 2013 11:54
Kartik Lakshminarasimhan and Akash Sridhar presented paper titled Performance and Energy Efficient Cache System Design : Simultaneous Execution of Multiple Applications across Heterogeneous Cores at the Annual Symposium on VLSI (ISVLSI-13) at Natal, Brazil, on the 6th of August 2013.
Last Updated on Monday, 04 November 2013 12:11
Rajagopal Hariharan of WARFT gets Barcelona Supercomputing Centre -Severo Ochoa International Scholarship
Saturday, 08 June 2013 03:36
Rajagopal Hariharan of WARFT gets Barcelona Supercomputing Centre -Severo Ochoa International Scholarship. He is the first and only Non-EU International student to have been awarded this prestigious scholarship.
Last Updated on Thursday, 01 August 2013 12:59
Vignesh Saptharishi Ramesh of WARFT gets admitted to the PhD program in neuroscience at Brandeis University with full funding
Saturday, 08 June 2013 03:36
Last Updated on Sunday, 09 June 2013 06:29
Prashanth Muralidharan of WARFT flies to Max Planc Institute Dresden as a Visiting Scientist
Saturday, 08 June 2013 03:23
Prasanth Muralidharan of Computational neuroscience group of WARFT is going to Max Planc Institute as a Visiting scientist.
Last Updated on Sunday, 09 June 2013 09:13
WARFT Students Demonstrate India's first ever Many-Core Simulator for designing supercomputing nodes at ISC - Hamburg, Germany
Saturday, 09 October 2010 15:14
Ram Srivatsa Kannan (4th year Anna University Chennai) and Prashanth Thinakaran (4th year Anna University Chennai) presented the paper "WIMAC - A Novel Many core simulator for very large clusters running multiple applications" at the International Supercomputing Conference, (ISC-12) Hamburg, Germany in July 2012.
Rajagopal Hariharan (4th Year B.E ECE, Sri Venkateswara College of Engineering) presented two papers namely,
"Compilation Accelerator on Silicon"
"SCOC IP Cores for Custom Built Supercomputing Nodes"
at the Annual Symposium on VLSI (ISVLSI-12) at the University of Massachusetts, Amherst on August 2012.
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